The present invention relates generally to polishing processes, particularly the planarization process used in the manufacturing of semiconductor devices. More particularly, the present invention relates to a planarization process having an electrically insulated pad conditioner.
During manufacture, semiconductor wafers used in semiconductor fabrication typically undergo numerous processing steps, including deposition, patterning, and etching steps. Details of these manufacturing steps for semiconductor wafers are reported by Tonshoff et al., “Abrasive Machining of Silicon”, published in the Annals of the International Institution for Production Engineering Research, (Volume 39/2/1990), pp. 621-635. In each manufacturing step, it is often necessary or desirable to modify or refine an exposed surface of the wafer in order to prepare the wafer for subsequent fabrication or manufacturing steps.
One method of modifying or refining exposed surfaces of a wafer involves treating the wafer surface with a slurry containing a plurality of loose abrasive particles dispersed in a liquid. Typically, this slurry is applied to a polishing pad and the wafer surface is then moved against the pad in order to remove or take material off of the wafer surface. The slurry may also contain agents that chemically react with the wafer surface. This type of process is commonly referred to as a chemical-mechanical planarization or polishing (CMP) process.
A variation of CMP, electro-chemical-mechanical planarization or polishing (ECMP), adds electrical current flow through an electrolytic solution and the surface of the workpiece. See, for example, U.S. Pat. No. 5,911,619 (Uzoh et al.), which describes methods for planarizing the surface of a wafer by combining chemical mechanical planarization with electrochemical planarization methods.
Electro-chemical mechanical deposition (ECMD) methods and equipment have also been described in the art. See, for example, U.S. Pat. No. 6,176,992 (Talieh), which describes a method for simultaneously depositing and polishing a conductive material on a wafer. Electrical current can also be used in a wafer planarization process for other purposes, such as, for example, detecting the end point of a processing step.
One problem with CMP, ECMP, ECMD, and other wafer planarization and polishing processes is that the process must be carefully monitored in order to achieve a desired wafer surface topography. The use history of the polishing pad, for example, may affect the polishing results. The polishing pad surface is conditioned so that it is maintained in a proper form.
The polishing pad is conditioned with an abrasive article commonly referred to as a pad conditioner. After repeated conditioning steps, the pad conditioner eventually becomes incapable of conditioning the polishing pad at a satisfactory rate and uniformity. The highly corrosive environment in which the pad conditioners are frequently used can accelerate the rate at which the pad conditioners become spent.
Replacement of a spent pad conditioner in a wafer processing system can negatively impact productivity and create undesirable changes to the wafer processing conditions. Accordingly, the efficiency of a wafer planarization process can be increased if the useful life of the pad conditioner can be increased. Similar considerations apply to other slurry and fixed abrasive polishing processes.